First Commit
This commit is contained in:
1
.obsidian/plugins/text-extractor/cache/d67a19d0f7b6bf1e2cfd2e8dc5e025a5.json
vendored
Normal file
1
.obsidian/plugins/text-extractor/cache/d67a19d0f7b6bf1e2cfd2e8dc5e025a5.json
vendored
Normal file
@@ -0,0 +1 @@
|
||||
{"path":"Attachments/Webapp Requirements.md/Exported image 20231126172008-11.png","text":"=D RSTC1[Tor (o] g IS] (T o) = wa‘;figjdgfl 1w 7 1) Quantify the signal range of your signal/power interface to determine the ESD diode’s working voltage. ) D T=Tol o [=RVY] oYY d o TR WU T Y Lo [T g Yot a oY g - oY ll o YTo [T Yot u oYy - | W eleTaViF={¥ N e o] is preferred. 3) Decide the maximum capacitance can be accepted for the interface. 4) Determine what TLP voltage the system fails at to determine the necessary clamping voltage of the diode. ) I S V=R g 1l d g YN0 [oTo [W=V(o=T<To R | @M Sy K0 0 [0 B Ep A [SAVZT I","libVersion":"0.3.1","langs":"eng"}
|
||||
Reference in New Issue
Block a user